Microprocessor-based systems presently are used in a wide variety of applications to provide computation and other signal processing functions under so-called "software" control. As is well known, memory structures are typically provided in such systems to store program instructions and data. It is usually necessary to provide both non-volatile memory (i.e., memory that will retain its contents even when the power supply to the system is turned off) as well as read/write random access memory (RAM) which may be used for storing temporary data and user-developed program instructions. Due to speed and flexibility considerations, semiconductor memory devices are typically now used to provide both non-volatile and read/write storage.
Of course, there are many different types of semiconductor memory devices presently commercially available. Perhaps the most commonly-used semiconductor memory device is the semiconductor read/write random access memory (RAM). RAMs are available in both bipolar and MOS technologies. In general, RAMs have the advantages of high density (i.e., high storage capability per unit volume), high speed and low cost. For these reasons, RAMs are typically the memory device of choice for microprocessor-based systems. RAMs can be obtained which have a memory access time which is shorter than the switching speeds of available microprocessors, so that the RAM does not limit the speed at which the microprocessor can execute program instructions.
RAMs, however, are volatile memory devices, and therefore lose their contents if their power supply is interrupted. Therefore, processing systems which may be turned on and off or which may have to be reset often are also typically provided with a non-volatile storage device for storing information which will be reused. Information which must be stored in a non-volatile storage device includes, for example, program instructions which must be executed each time the system is powered up. It is typically desirable to store all program instructions in nonvolatile memory (unless those program instructions must be capable of being altered by the user during the course of operation of the system).
One type of non-volatile storage which is often used is a semiconductor read only memory (ROM). In general, semiconductor ROMs are available in three types: mask-programmed ROMs, electrically programmable read only memories (PROM), and erasable programmable read only memories (EPROM). Information is stored in mask-programmed ROMs at the time of manufacture, and may not be changed by the user. Mask-programmed ROMs are relatively inexpensive if made in high volume, but are ordinarily not used for small-volume applications because of the expense of preparing and specifying a mask. In addition, maskprogrammed ROMs are ordinarily not used in a system unless the system software has been thoroughly tested, since their contents may not be changed.
PROMs, on the other hand, may be electrically programmed by a user. PROMs store no information when purchased. The user "programs" data into the PROM by applying electrical signals to it. Once the programming process is complete, the data which is stored in the PROM is permanent and cannot be altered. PROMs find wide use in low-volume applications (where mask-programmed ROMs would be uneconomical), as well as in applications where the stored information might be subject to change (for instance, where the system is still under development). PROMs are non-volatile, but if their contents are to be changed, may must be replaced.
Erasable programmable read only memories (EPROMs) are similar to PROMs except that they may be erased and reused. Typically, EPROMs are provided with a quartz lid which passes ultraviolet radiation. When the EPROM is exposed to ultraviolet radiation, its contents are erased. The EPROM may then be electrically programmed in a manner similar to that used to program a PROM. EPROMs are very useful for storing information that might be subject to change. However, EPROMs are expensive compared to RAMs, mask-programmable ROMs and PROMs. Moreover, EPROMs generally have greater access time than RAMs; in the past, the speed of a microprocessor executing instructions stored in an EPROM has been limited by the relatively slow access speed of the EPROM. As technology has advanced, faster EPROMs have been developed. However, EPROMs are still slow relative to RAMs, and are far more expensive.
One solution used in the past to provide nonvolatile storage for program instructions is to use the architecture shown in FIG. 1. A PROM memory device 20 stores micro-instructions to be executed by a processor 10. PROM memory 20 is non-volatile, and therefore retains the micro-instructions when the power to the system is shut off. A RAM 30 is used only to store temporary data developed by the processor 20 in the execution of the microinstructions. It does not matter too much if the temporary data stored by RAM 30 is lost, so the fact that the RAM is volatile is not detrimental. This architecture is well known in the art, and is disclosed in, for instance, U.S. Pat. No. 4,038,643 to Kim (issued July 26, 1977), U.S. Pat. No. 4,203,154 to Lampson et al (issued May 13, 1980) and U.S. Pat. No. 4,085,442 to Liaukus et al (issued Apr. 18, 1978). The architecture shown in FIG. 1 is quite suitable where PROM 20 need only store a small number of instructions (and therefore need only have a small number of locations). However, PROMs which have the capacity of storing a large number of instructions are relatively expensive. Moreover, if some portion of the stored program must be changed, PROM 20 must be discarded and a new PROM programmed and installed.
Of course, a more flexible way to provide program instructions to the processor for execution is to simply load them into RAM 30 each time the system is powered up. Data residing on a non-volatile mass storage device such as, for instance, a magnetic disk or tape might be loaded into RAM 30 each time the system power is turned on. The user need only change the information stored on the mass storage device in order to change the function of the processor. The loading of information from mass storage into a RAM must itself typically be performed by the processor under program control.
The architecture shown in FIG. 2 includes a PROM memory 20 for storing micro-instructions which includes instructions which direct processor 10 to transfer information from magnetic disk 40 to RAM 30. PROM 20 may contain a variety of initialization information (such as values for pointers pointing to locations in RAM 30) which may be used to initialize processor 10 at the time that power is applied to the system. Processor 10 may execute instructions contained in PROM 20, instructions loaded into RAM 30 from magnetic disk 40, or both. RAM 30 also may be used, of course, to store temporary data produced during execution of the instructions. This architecture is disclosed, for example, in U.S. Pat. No. 4,025,904 to Adney et al (issued May 24, 1977), U.S. Pat. No. 3,778,775 to Haring et al (issued Dec. 11, 1973), U.S. Pat. No. 4,165,534 to Dummermuth et al (issued Aug. 21, 1979), U.S. Pat. No. 4,204,206 to Bakula et al (issued May 20, 1980) and U.S. Pat. No. 4,204,208 to McCarthy (issued May 20, 1980).
Not all of the instructions stored on magnetic disk 40 need to be transferred into RAM 30 at once. U.S. Pat. No. 4,080,651 (issued Mar. 21, 1978), U.S. Pat. No. 4,080,652 (issued Mar. 21, 1978) and U.S. Pat. No. 4,126,894 (issued Nov. 21, 1978) all to Cronshaw et al disclose the transfer of information from mass storage 40 to RAM 30 in overlays without intervention from processor 10 but rather through use of a separate processor (not shown) dedicated to that purpose. RAM 30 may have a switching speed essentially the same as processor 10, and therefore not limit the speed of execution of program instructions by the processor. However, since the cost of a RAM increases with the amount of information which it must store, a small RAM is used and overlays of information from magnetic disk 40 are selectively loaded when needed into RAM 30 for execution by processor 10. Once the loaded instructions have been executed, they may be written over by new instructions yet to be executed which reside on magnetic disk 40. RAM 30 is typically called a "cache" or "accelerator" storage because it is both relatively small and has a low access time. The use of a cache store is also disclosed in U.S. Pat. No. 4,313,158 to Porter et al (issued Jan. 26, 1982) and U.S. Pat. No. 4,051,461 to Hashimoto et al (issued Sept. 27, 1977).
U.S. Pat. No. 4,403,283 to Myntti et al (issued Sept. 6, 1983) and U.S. Pat. No. 4,295,192 to Porcella (issued Oct. 13, 1981) both disclose memory mapping techniques for expanding the addressing space which a processor is capable of addressing. Although microprocessors typically are capable of addressing only a limited number of storage locations (the number of storage locations being limited by the number of bits in the address produced by the microprocessor), it is often necessary to address a larger address space than the microprocessor is designed for. Memory "mapping" or translating arrays (which may be either sequential machines or combinational logic arrays) supply higher-order address bits, thus increasing the address space accessible by the processor.